Amit Dutta , Yoshiaki Honda, Masao Kimura, Masanori Otobe, Akira Itoh, Shunri Oda

Department of Physical Electronics and Research Center for Quantum Effect Electronics,
Tokyo Institute of Technology,
2-12-1 O-okayama, Meguro-ku, Tokyo 152.
Tel: +81-3-5734-2542, Fax: +81-3-5734-2911
 

Silicon based nanoelectronics have achieved considerable attention in recent years. We have fabricated single electron tunneling (SET) devices using a quasi one dimensional array of Si nano-particles. These Si nano-particles were prepared by very high frequency plasma processing developed by our group[1]. We have fabricated heavily doped poly-silicon electrodes on SiO2/Si substrates having very small gaps of 25~100 nm, by electron beam lithography and electron cyclotron resonance etching. Fabrication of electrode structure for SET transistors having two electrodes acting as source and drain electrodes and substrate as back gate and SET transistors having additional inplane electrodes acting as gate was performed. Si nano-particles were deposited on theses electrode structure. Although deposition of Si nano-particles are random, the electrical characteristics are determined by the lowest resistance tunneling path connecting the source and the drain electrodes. Hence, current flows through a quasi one dimensional array of quantum dots. I-V characteristics without application of gate voltage shows Coulomb staircase at room temperature. Inter-dot capacitance calculated form separation between steps of Coulomb staircase was in the range of 0.7 ~1.3 aF. Details of I-V characteristics and conductance vs. gate voltage characteristics will be reported. Reference: [1] S. Oda and M. Otobe, Mat. Res. Soc. Symp. Proc. 358, 721(1995). Japanese Journal of Applied Physics; in Press; 学術誌 ; (1997)